# AMENDMENT-24G · the Strata bench's third setup: one 24 GB desktop card (the desktop's smaller card) in the desktop, beside live production on the desktop's larger card

*Internal: names the desktop, the desktop's larger card, the desktop's smaller card, the laptop and local paths; not for shipping. Every time is UTC from `date -u`.
Strata (github.com/Niko1221/Strata) is an unrelated project; strata2signal has no affiliation with it.*

| | |
|---|---|
| **Registered** | 2026-10-09T01:49:12Z (`date -u` on the laptop, read by the stamp step as this file was written), by the lane `bsw-register` (Opus), before any the desktop's smaller card reading |
| **Before any reading** | Yes. Read on the desktop at 2026-10-09T01:46:04Z (`scratch/bsw-register/desktop-read.txt`): `~/card24-strata/` holds `build/` and `stage/` only (the stage lane's two `sm_86` builds, BUILD DONE 01:33:09Z); 0 records, rows, markers or frozen files under it; the desktop's smaller card's 2 compute processes are the classifier seat's (production). No the desktop's smaller card row of either engine exists anywhere, and nothing has run the IQ3_S file on the desktop's smaller card |
| **Preamble** | `~/bench-archive/LANE-PREAMBLE.md` v3.1, sha256 `07986860dd5975c7…` (read and matched) |
| **Authority** | an operator, 2026-10-09 ~01:2xZ, verbatim as the brief quotes it: "i think only the longtable needs the desktop's smaller card on the desktop, yeah?" / "if so, then it's honestly NBD to bench it tonite, and we should... having 3 columns, 2x on the same server (1x 6000, 1x 3090 ti, w 128g ram) vs 5090 laptop w/ 64g ram, would be some nice #s to have"; the AskUserQuestion answer "The desktop's 3090 in tonight's 07:30Z window" (the desktop's Ampere card is the desktop's smaller card, an RTX 3090 Ti, since the 09-25 swap); earlier, "i'd like to post the strata article ASAP, while it's still hot" / "hopefully tomorrow". Ledger D-20261009-004 |
| **Status** | An amendment to the Strata bench (`plans-2026-10-02/strata-bench/PREREG.md` and its amendments A1-A9) and to the desktop rows' registrations (`plans-2026-10-05/`: PREREG-BANDS, PREREG-W0, -W1, -W2). It adds a third setup: two speed arms, one fit, and two quality reads if time allows. It moves no arm, band, gate, threshold or stop rule of the laptop's rows or the desktop's |
| **Sources, read by name** | PREREG.md `withheld-2026-09-29` (§1-§4, A1-A9); HARNESS-NOTES.md `85a043b8…` (§4, decision 6, §10.2); PREREG-BANDS `withheld-2026-09-29`; PREREG-W0 `withheld-2026-09-29` (§4, §9, §10); PREREG-W1 `withheld-2026-09-29`; PREREG-W2 `withheld-2026-09-29`; window 1's RECOUNT `80cb475c…` and window 2's `16ed41c5…`; records `L-IQ3-t8/speed/a1/server.log` `e97dee0d…`, `S-NEW/speed/a2/strata-engine.log` `448cd73d…`, `FROZEN-NCMOE-L-IQ3.json` `d05e19e2…`; desktop-nightly `RECON.md` §1; `desktop-swap-2026-09-25/THE DESKTOP-PARTS-2026-09-25.md`; estate #155's `window-desktop-24g.sh` at origin/master; ledger D-20260926-001, -004, -005, -006 and D-20261009-004; the page's release candidate (`plans-2026-10-08/articles/flash-next-on-a-laptop-card-and-a-desktop-card/RELEASE-CANDIDATE.md`); this window's kit as it stood at 01:40Z (`kit/arms.sh`, `kit/telemetry.py`, `kit/window.sh`, `kit/rowserver.py`) and `stage-receipts/` |
| **The arithmetic** | `scratch/bsw-register/bands.py` and its output `bands.out` (this folder), copied into §3 |

---

## 0 · What this adds

The Strata bench measured Qwen3.8-Flash-Next (ISTA-DASLab GSQ-RCO IQ3_S) on two engines, the Strata engine and
llama.cpp: on the laptop's 24 GB card (the laptop, 2026-10-02 → 10-05) and, one engine a night, on the desktop's 96 GB card,
the desktop's larger card (R-LS-IQ3 on 2026-10-06, R-S139-IQ3 on 2026-10-07). This amendment registers the same two engines, file,
prompts and client on a **third setup: the desktop's smaller card, the desktop's 24 GB card**, so the page can set three columns side by side:
a 24 GB laptop card with 64 GB of RAM, a 96 GB desktop card, and a 24 GB desktop card in that same desktop computer with
128 GB of RAM. Two speed arms, **R-S139-IQ3-24G** (the Strata engine 0.1.39) and **R-LS-IQ3-24G** (llama.cpp
3cf03257), run in one window beside live production on the desktop's larger card. Their 4K writing-speed bands are drawn in §3, by the
desktop's method, before any reading. The labels are this window's kit's (`kit/arms.sh` at 01:40Z).

## 1 · The setup

| Item | Value, as read |
|---|---|
| The computer | the desktop: **AMD EPYC 7532**, 32 cores / 64 threads, one socket, one NUMA node (lscpu, 01:46:04Z); Zen 2: AVX2, FMA, F16C; **no AVX-512, no AVX-VNNI** (desktop-nightly RECON §1) |
| Memory | **MemTotal 129,384,948 kB = 123.39 GiB** (01:46:04Z; PLAN-W1 read the same on 10-05); 8 × Micron 16 GB DDR4-3200 RDIMM, one per channel, 128 GB installed (dmidecode, the 09-25 parts read); MemAvailable 105,425,396 kB = **100.54 GiB** at 01:46:04Z with every production seat up, the desktop's smaller card's included |
| Disk | **WD_BLACK SN850X 2 TB NVMe** (lsblk, 01:46:04Z). The IQ3_S pair at `~/bench-flashnext/models/IQ3_S/`: shard 1 54,817,524,224 B `4c1eb2ce…`, shard 2 28,800,138,432 B `316b46f3…` (window 0's pins), read OK by the stage at 01:28:33Z |
| The card | **the desktop's smaller card**: EVGA GeForce RTX 3090 Ti FTW3 Ultra (nvidia-smi `NVIDIA GeForce RTX 3090 Ti`), Ampere, compute capability 8.6, **24,564 MiB**, PCI bus withheld-2026-10-13, link max gen 4 x16 (01:46:04Z; gen 4 x16 read under load on 09-26, D-20260926-004); driver 595.84; enforced limit 350.00 W now, max 480 W |
| The card's cap for the rows | **300 W**, set by the kit's open with persistence on (`window.sh` B3) and read back before each arm; never above 350 W (the 09-25 LB, D-20260926-001) |
| The condition every row carries | **the desktop's larger card serving production beside it.** the desktop's RTX PRO 6000 (bus withheld-2026-10-13) keeps serving docent-vllm, ollama.service and rerank-seat-withheld-2026-10-13, and for the window also the classifier seat ollama-11435 (mistral-small3.2:24b and nomic-embed-text), moved there by the kit's open and proven by growth and live calls (the 09-26 pattern, estate #155). The bench never touches, stops or loads the desktop's larger card. Every the desktop's smaller card figure carries the label **"beside live work on the computer's other card"**, as the laptop's figures carry their shared-work labels |
| Card selection | `CUDA_DEVICE_ORDER=PCI_BUS_ID` and `CUDA_VISIBLE_DEVICES=<the desktop's smaller card's index in PCI order>`, resolved from bus withheld-2026-10-13 at launch and checked by name (`kit/arms.sh` A0): never a bare index, never a UUID; the desktop's larger card is hidden from every bench process |

The three setups, as the page's columns:

| | The laptop | The desktop, 96 GB card | The desktop, 24 GB card (this amendment) |
|---|---|---|---|
| Computer | the laptop: Core Ultra 9 290HX Plus (24 cores, 8 of them P-cores, no SMT); 64 GB DDR5-5600 in two channels (MemTotal 61.23 GiB) | the desktop: AMD EPYC 7532 (32 cores); 128 GB DDR4-3200 in eight channels (123.39 GiB) | the same computer |
| Card | GeForce RTX 5090 Laptop GPU, 24 GB (24,463 MiB) | RTX PRO 6000 Blackwell Workstation Edition, 96 GB (the desktop's larger card) | GeForce RTX 3090 Ti FTW3 Ultra, 24 GB (the desktop's smaller card) |
| Published card bandwidth | 896 GB/s | 1,792 GB/s | 1,008 GB/s |
| Published host-memory bandwidth | 89.6 GB/s | 204.8 GB/s | 204.8 GB/s |
| Card ↔ host link | the Strata engine's probe: 28.7 GB/s | not used for experts | PCIe 4.0 x16, 31.5 GB/s published one way |
| llama.cpp placement | 34 of 48 layers' experts in system memory | every layer on the card | N of 48 in system memory (§2.2) |
| Strata placement | 8,120 (0.1.25) / 8,073 (0.1.39) of 24,576 experts on the card | 24,576 of 24,576 | the engine's auto cache (near 8,100 expected [inferred]) |
| Beside | the laptop's other jobs, labelled per row | the computer's services stopped | production live on the other card |
| Cap | the laptop's floating limit (135-150 W) | 300 W | 300 W |

## 2 · The arms

### 2.1 · R-S139-IQ3-24G: the Strata engine 0.1.39 on the desktop's smaller card

- **Engine.** Strata at `6f32ec070f23ced9f50e704d854d775da52591ab` (= `v0.1.39^{commit}`, the desktop's tag; STRATA-DELTA-2
  CLEAR TO STAGE, D-20261005-108), built on the desktop from source by the stage with `build-strata.sh`'s flags, window 0's
  RPATH fix and window 0's llama.cpp 3cf03257 clone for ggml, and **one build flag moved:
  `-DCMAKE_CUDA_ARCHITECTURES=86`** (the stage's receipt: CUDA 13.4.92, arch 86, 58 `sm_86` ELF entries and no other
  architecture in `strata`, built in 58 s, `strata` sha256 `2d713a91…`, BUILD DONE 01:33:09Z). No installer, no
  `setup.py`, no prebuilt binary (the Strata rules). A new build sha is a new label: this row is never an attempt of
  R-S139-IQ3.
- **The line: the desktop row's, element for element** (PREREG-W2 §2, which is the laptop's S-NEW line pinned):
  `--pack <pack> --native <shard 1> --ple-gguf <shard 2> --expert-profile <src>/data/expert-profile.bin --expert-cache auto
  --prefill auto --spec 4 --spec-min-p 0.5 --mtp <rt> --max-context 131072 --kv int8`, built by the client's own
  `engines.strata_engine_args` given the laptop's MemTotal (61.23 GiB), so **no `--kv-resident`**; the line setup's rule
  would write for the desktop's 123.39 GiB (`--kv-resident 32768`) is printed beside it, never used; **no `--pool-workers`**
  (C-11); ENGINE_ENV `STRATA_NO_LARGEPAGES=1`; THP as the stage read it (`enabled=madvise defrag=madvise`), re-read at the
  launch; the config's keys as PREREG-W2 §2 (no `vision`, `mcp_servers`, `api_key` or `gpu` key; never a POST `/config`
  or `/v1/vram`).
- **What a 24 GB card forces, named one by one. No flag of the line moves.** The card forces:
  1. the build target, `sm_86` (above);
  2. **the value `--expert-cache auto` resolves to**: the slots that fit the card's free memory after the dense weights,
     the draft head and the verifier's buffers, expected near the laptop's 8,073 (the laptop read 16.08 GiB free on a
     24,463 MiB card; the desktop's smaller card has 24,564 MiB) [inferred], instead of 24,576. With it comes the
     regime: the experts not cached are computed by the engine's CPU pool or read over PCIe per request, so each request
     prints a hit-rate line and a PCIe share, and the verifier's "100% VRAM resident: zero-doorbell graph" line is
     absent. The label is **"partial residency (n of 24,576 slots; hit rate h; PCIe share p)"** (PREREG-W2 §4's wording
     with the PCIe share added), n from the engine's own `expert cache <n> slots` line, h and p the medians over the
     requests;
  3. the prompt path's slot loan (its own `the prompt path borrows <n> CUDA0 cache slots` line), printed with its n;
  4. which card the process sees (the desktop's smaller card, by bus id).

  The 128K context stays: the int8 KV cache at 131,072 tokens is 12 × 131,072 × 1,056 B = 1.66 GB on the card (RECON-v1,
  the physics table) [inferred], and the laptop's 24 GB card ran this engine family's 128K slice (S-IQ3). An engine
  refusal at 128K is a recorded refusal, never a changed flag. The host side differs from the laptop's in room only: the
  laptop's S-NEW stopped at 128K on host memory (A9-1); the desktop has 123.39 GiB (§6).
- **Threads.** The engine takes no thread flag; its `N expert-pool workers + the host thread` line is recorded (31 + 1 on
  the desktop at R-S139-IQ3; the same expected [inferred]). Unlike on the desktop's larger card, these workers compute the uncached experts here.
- **G0**, the bench's (`engines.strata_g0`): /health; "this CPU has no AVX-512: the expert kernels run on AVX-2"; no
  control-vector line; `/metrics` `cvec` 0. The PCIe probe line, the arena line and the GPU line are recorded.

### 2.2 · R-LS-IQ3-24G: llama.cpp 3cf03257 on the desktop's smaller card, and its fit

- **Engine.** llama.cpp `3cf03257f219afbe7334045ff7c6a06ac68c627d`, built on the desktop by the stage with window 0's flags and
  `-DCMAKE_CUDA_ARCHITECTURES=86` (CUDA 13.4.92; 143 `sm_86` ELF entries in `libggml-cuda.so`; `llama-server` sha256
  `1d702293…`, the 14 binaries in `stage-receipts/BINARIES.sha256`; RUNPATH the staged 13.4 folder; `GGML_NATIVE` on, so
  the EPYC's AVX2 path).
- **The line: the laptop's L-IQ3-t8 line, flag for flag** (HARNESS-NOTES §10.2, A3-3; the desktop's R-LS-IQ3 line with
  N in place of 0): `-m <shard 1> --host <loopback> --port withheld-2026-10-13 -ngl 99 --n-cpu-moe N -c 131072 -fa on -ctk q8_0 -ctv q8_0
  -lm mmap --lazy-mode on -fit off -np 1 --cache-ram 0 --no-webui --jinja -lv 4 -t 8 -tb 8`: llama.cpp's default 512-token
  micro-batch (no `-b`/`-ub`, as on both other setups), 8 threads (A3-1; the live seats keep the rest of the CPU), flash
  attention on, an 8-bit KV cache. **The one value a 24 GB card forces is N.**
- **The fit, the registration's road.** HARNESS-NOTES decision 6 with A7-3's procedure, on this arm's whole line: each
  candidate N is loaded once in its own unit and held 10 s with no request; its fit row reads the card's peak
  `memory.used` from the 1 Hz samples against the desktop's smaller card's 24,564 MiB; `freeze-ncmoe` freezes, once, **the smallest N whose
  RESULT fit row leaves at least 1,536 MiB free**, from that one fit row id, into `FROZEN-NCMOE-R-LS-IQ3-24G.json`.
  Candidates in this order: **34** (the laptop's frozen N, the prior); then 33 if 34 passed; or 35, 36 … 40 in turn if
  34 failed; the first failure after a pass ends the search. A candidate that does not reach /health is its own record.
  If no candidate up to 40 leaves the margin, the arm has no speed phase. The expectation [inferred]: the laptop's fit
  read 22,449 MiB used at N = 34 and 20,347 at N = 36 of 24,463 MiB, about 1,051 MiB a layer (A7-3); with 101 MiB more
  on the desktop's smaller card, N = 34 leaves about 2.1 GiB and N = 33 about 1.0 GiB, under the margin, so the fit is expected to freeze
  34.
- **The prior road, registered so the window needs no second registration.** If the window's kit carries no fit step (as
  `kit/arms.sh` stood at 01:40Z: `--ncmoe 34` read from FROZEN-NCMOE-L-IQ3.json), the row runs at **N = 34** and every
  figure carries "N = 34, the laptop's fit, not refitted on this card". The speed phase's own load is then read against
  the fit rule's margin (the card's peak `memory.used` before the first request); a margin under 1,536 MiB prints beside
  every figure ("under the fit rule's margin"), never a stop. Which road ran prints with the row.
- **G0**, the bench's (llama.cpp): /health; the server's `build N (3cf03257…)` banner; exactly one CUDA device and no
  Vulkan device (the build carries no Vulkan backend; the stage reads `GGML_VULKAN` from its CMakeCache); the start's
  `n_threads = 8 (n_threads_batch = 8)` line (A3-4); `flash_attn` as the start log reads it. A refusal is final.

### 2.3 · Prompts, client and clock: the same on all three setups

The Strata bench harness's own client (`inner.py` and its import closure: window 2's 22 files, byte for byte,
`kit/client/CLIENT-SHA256SUMS` `f11815c6…`) and the frozen `SLICES.json` (`withheld-2026-09-29`): prompts of **4,038 / 32,038 /
128,037 tokens**, each opening with the kit's seeded nonce (A1-3); **256 greedy tokens, thinking off**; the order 4K × 3,
32K × 3, 128K × 3, one server start per arm and phase; the decode timed on the client's clock,
`(completion_tokens − 1) / (t_finish − t_first_token)` (A1-2), with the engine's own figure beside it; each context's
figure is **the median of its 3 runs, the first run after the load included** (A2). Port withheld-2026-10-13, loopback, a fresh API key
made inside `inner.py`, passed by environment only. The egress fence of record is `inner.py`'s own `netns` mode inside
its bwrap sandbox, proved by its own probe before any engine starts: the engine never downloads, and the network is cut
as the bench cut it. The unit's IPAddressDeny cannot ride a user unit; it reads "not enforced" and never gates (the
kit's note, as in window 2).

## 3 · The bands: writing speed at 4K, drawn before any run

### 3.1 · The method, the desktop's (PREREG-W0 §4, PREREG-BANDS)

Published bandwidth over the bytes read per generated token gives a ceiling; the band is a share of that ceiling, with an
outside range, a floor and a VOID line; no reading of the setup being banded is an input. On the desktop's larger card the ceiling was one
card's: 1,792 GB/s ÷ 5.159 GB = 347.4 tok/s. llama.cpp's band was 24-46 % of it (85-160 tok/s); the Strata engine's was
14-37 % of it in verify rounds a second, times 2.25-2.69 tokens a round (113-350 tok/s). On the desktop's smaller card part of each token's
bytes is read from host memory or over PCIe, so the ceiling adds the parts, each at its own published speed. **The
shares are the desktop's, unchanged.**

**Inputs.**
- **Bytes per generated token** (PREREG-W0 §4): the dense path **4,176,458,240 B** (attention, DeltaNet, shared-expert,
  router and hyper-connection weights 3,589,245,440; the n-gram projection 65,740,800; the output head 521,472,000) and the
  routed experts **982,272,000 B** (10 of 512 experts in each of 48 layers; the file header's 10/512 of its
  50,292,326,400 B arena), which is **20,464,000 B per layer**; 5,158,730,240 B in all.
- **Published speeds:** the desktop's smaller card **1,008 GB/s** (the GeForce RTX 3090 Ti: 384-bit GDDR6X at 21 Gbps); the desktop's memory
  **204.8 GB/s** (8 channels × 8 B × 3.2 GT/s); PCIe 4.0 x16 **31.508 GB/s** one way (16 GT/s × 16 lanes × 128/130 ÷ 8).
  None was measured on the desktop.
- **Where the Strata engine read each expert,** for its ceiling only: the laptop's S-NEW speed a2 (the same engine version
  on a 24 GB card, 8,073 slots; `strata-engine.log` lines 38-51), the engine's own counts per request of hits (on the
  card), lookups (hits plus the CPU pool's misses) and experts "read by the GPU over PCIe", out of all routed. These are
  placement counts, not speeds. S-NEW a2 is a STOPPED attempt (on host memory as its 128K slice began, A9-1); its six
  finished requests' counts are the ones used.
- **Tokens a round:** the laptop's S-IQ3 values, 2.25-2.69, the desktop's input, unchanged.

### 3.2 · llama.cpp: the ceiling C(N) and the band

At one stream, llama.cpp computes each layer's CPU experts between that layer's attention on the card and the next
layer's, so the two parts add:

> C(N) = 1 ÷ [ (4,176,458,240 + (48 − N) × 20,464,000) B ÷ 1,008 GB/s + N × 20,464,000 B ÷ 204.8 GB/s ]

At N = 34: 4,462,954,240 B ÷ 1,008 GB/s = 4.4275 ms on the card; 695,776,000 B ÷ 204.8 GB/s = 3.3973 ms from host
memory; 7.8248 ms a token, so **C(34) = 127.80 tok/s**.

| Band (decode at 4K, median of 3) | Share of C(N) | **At N = 34 (tok/s)** | What it means |
|---|---:|---:|---|
| **Predicted** | 24-46 % | **31-59** (30.67-58.79) | the prediction holds |
| Outside the prediction | 12-24 % or 46-100 % | 15-31 or 59-127.80 | the row stands as measured; the miss is reported and the reading opened |
| Under the floor | under 12 % | under 15 (15.34) | the row stands; no figure is quoted until §4's placement is read |
| Impossible | above 100 % | above 127.80 | **VOID**: a wrong file, flag, card or reading, never the card's doing |

**The band of record is the frozen N's row:** the shares rounded to the nearest whole tok/s (halves up), the VOID line
C(N) to two places. From `bands.out`:

| N | on the card (ms) | from host memory (ms) | C(N) (tok/s) | Floor | Band | VOID above |
|---:|---:|---:|---:|---:|---:|---:|
| 32 | 4.4681 | 3.1975 | 130.45 | 16 | 31-60 | 130.45 |
| 33 | 4.4478 | 3.2974 | 129.11 | 15 | 31-59 | 129.11 |
| **34** | **4.4275** | **3.3973** | **127.80** | **15** | **31-59** | **127.80** |
| 35 | 4.4072 | 3.4973 | 126.51 | 15 | 30-58 | 126.51 |
| 36 | 4.3869 | 3.5972 | 125.25 | 15 | 30-58 | 125.25 |
| 38 | 4.3463 | 3.7970 | 122.80 | 15 | 29-56 | 122.80 |
| 40 | 4.3057 | 3.9969 | 120.44 | 14 | 29-55 | 120.44 |

Any other N takes the same formula; the lead writes that row into the ledger at the freeze, before the speed phase.

**The check against readings already on file** (not inputs; the shares were set on 2026-10-05, before either reading): the
same formula on the laptop (896 GB/s, 89.6 GB/s, N = 34) gives C = 78.45 tok/s (4.9810 ms on the card + 7.7654 ms from
host memory); L-IQ3-t8's 24.424 tok/s is **31.1 %** of it, and the 4-thread L-IQ3's 20.24 is 25.8 %. The desktop's larger card's R-LS-IQ3,
102.889 tok/s, is **29.6 %** of 347.4. A split placement and a whole one both read inside 24-46 %.

### 3.3 · The Strata engine: the per-round ceiling and the band

The desktop's simplification is kept: one token's bytes per verify round (a round reads at least one token's weights, and
runs the draft and the verify compute for up to 6 tokens). On the desktop's smaller card each routed expert is read where the engine read it:
on the card (share v), over PCIe (q), or by the CPU pool from host memory (c):

> C_round = 1 ÷ [ (4,176,458,240 + v × 982,272,000) B ÷ 1,008 GB/s + q × 982,272,000 B ÷ 31.508 GB/s + c × 982,272,000 B ÷ 204.8 GB/s ]

| S-NEW a2 request | v, on the card | q, over PCIe | c, CPU pool | The desktop's smaller card, ms a round | C_round (rounds/s) |
|---|---:|---:|---:|---:|---:|
| 1 (4K, first after the load) | 0.8032 | 0.0819 | 0.1149 | 8.0304 | **124.53** |
| 2 (4K) | 0.8759 | 0.0499 | 0.0743 | 6.9076 | 144.77 |
| 3 (4K) | 0.8720 | 0.0519 | 0.0761 | 6.9761 | 143.35 |
| 4 (32K) | 0.8874 | 0.0451 | 0.0675 | 6.7383 | 148.41 |
| 5 (32K) | 0.8909 | 0.0433 | 0.0658 | 6.6764 | **149.78** |
| 6 (32K) | 0.8902 | 0.0433 | 0.0665 | 6.6792 | 149.72 |

v = hits ÷ routed, q = PCIe ÷ routed, c = (lookups − hits) ÷ routed; request 1, for example: 126,451 hits, 144,546
lookups, 12,894 read over PCIe, 157,440 routed (log line 38).

So **C_round = 124.53-149.78 rounds/s**. With the desktop's shares and tokens a round: rounds a second 14 % × 124.53 =
**17.43** to 37 % × 149.78 = **55.42**; times 2.25 and 2.69 tokens a round:

| Band (decode at 4K, median of 3) | tok/s | How |
|---|---:|---|
| **Predicted** | **39-149** (39.23-149.08) | 17.43-55.42 rounds/s × 2.25-2.69 tokens a round |
| Outside the prediction | 15-39, or 149 up to that run's tpr × 241.35 | the row stands; the miss is reported and the reading opened |
| Under the floor | under 15 (14.94) | 12 % of 124.53 at one token a round: no draft gain at the floor's share |
| Impossible | above that run's tpr × 241.35, and above 1,448 whatever the rounds read | **VOID**, per run. 241.35 rounds/s is the dense path alone at the card's published speed (4,176,458,240 B ÷ 1,008 GB/s = 4.1433 ms), which every round reads whatever the experts do; 1,448 = 6 × 241.35, the verify window's 6 tokens |

Beside each run the row prints its rounds a second (decode ÷ its own `tokens_per_round_derived` = N ÷ (N − drafts
accepted), `engines.strata_request_facts`), its hit rate and its PCIe share, so the round share is read as well as the
product. A VOID run makes its context's figure VOID and is never dropped to make a median. **The band's top is 3.8 times
its floor**; "inside" says little there, and the page says so, as it says of the desktop's 3.1.

**The check against readings already on file** (not inputs): the desktop's larger card's R-S139-IQ3 median run, 78.58 rounds/s, is
**22.6 %** of 347.4. On the laptop, the same formula at its 896 GB/s, 89.6 GB/s and the engine's own 28.7 GB/s link probe
(a measured figure, used only in this check) gives ceilings of 104.12 / 122.82 / 121.54 rounds/s for S-NEW a2's three 4K
requests, which made 25.46 / 33.83 / 33.58 rounds/s at 2.667 / 2.510 / 2.753 tokens a round: **24.5 / 27.5 / 27.6 %**
(its 32K requests 26.6-28.9 %). A split placement and a whole one both read inside 14-37 %.

### 3.4 · Named risks, written before the run; they move no line

- **llama.cpp may read under its band [inferred].** The ceiling credits the CPU half with all eight channels (204.8 GB/s:
  3.40 ms a token at N = 34). The laptop's check passed with fast cores on two channels; here 8 threads of a Zen 2 part
  (2019, up to 3.3 GHz) compute the IQ3_S experts, whose table lookups bind on arithmetic before memory. The laptop's
  control at N = 42 (L-IQ3-ub, 22.5 tok/s, beside two audit jobs) against L-IQ3-t8 at N = 34 (24.424) puts each extra CPU
  layer at about 0.44 ms, about 47 GB/s of expert weights on 8 laptop threads. At 0.40-0.65 of that per thread on this
  CPU, the CPU half takes 23-37 ms; with 20-28 ms for the card and the hand-offs (the laptop's remainder was about 26 ms),
  the reading would land near **15-23 tok/s**: outside the band, low. If it does, the opening reads the CPU receipt (§5): about 8 busy
  threads through the decode says the threads bound it.
- **The Strata engine.** The same arithmetic applied to the laptop's own S-NEW requests sits mid-band. The risks: the
  engine's `sm_86` path, untested in this house (the third-party RTX 3090 reports, 62-99 tok/s, and the README's
  "100-140" estimate are claims about other computers, never inputs); production's work on the shared CPU, where the 31
  pool workers compute the misses; and the PCIe gen 4 link for the misses read over it.
- **Exploratory, no band, on both arms** (PREREG-BANDS rule (6)): the 32K and 128K readings, the first word and the prompt
  rate at every length.

## 4 · Placement and residency, read by name before any figure says where the weights were

**R-LS-IQ3-24G**, from the server's own log (PREREG-W1 §4 with N). The kit's `placement()` records a hybrid line
without judging it (`kit/rowserver.py`, bsw patch 2), so the lead applies this test to the kept log before any figure
prints:
1. `using device CUDA0 (NVIDIA GeForce RTX 3090 Ti)`, the only device line;
2. `offloaded 49/49 layers to GPU`;
3. `CUDA0 model buffer size` within ± 2 % of **4,881.42 + (48 − N) × 999.22 MiB** (18,870.50 at N = 34, L-IQ3-t8's
   `server.log` line 184: 18,870.50 − 14 × 999.22 = 4,881.42 is the card's non-expert share; 999.22 MiB =
   50,292,326,400 B ÷ 48 is one layer's experts); exactly one CUDA buffer;
4. the expert-bearing `CPU_Mapped model buffer size` within ± 2 % of **1,862.01 + N × 999.22 MiB** (35,835.49 at N = 34,
   L-IQ3-t8's line 183);
5. the n-gram table's `CPU_Mapped model buffer size` at **27,465.95 MiB ± 0.5**, the line named by
   `add: tensor per_layer_token_embd.weight (size = 27465 MiB) lazy read enabled`;
6. no other model buffer line.

Otherwise the row is VOID; lines absent or named otherwise print "placement unread". The words: "N of 48 layers' experts
in system memory; every other layer and weight on the card; the two input lookup tables in host memory".

**R-S139-IQ3-24G**, from the engine's own log (PREREG-W2 §4 for this card; recorded, never a stop):
1. exactly one `strata generate: GPU <n>: NVIDIA GeForce RTX 3090 Ti, compute capability 8.6` line;
2. `expert cache <n> slots, <x> GiB of VRAM` and `pre-filled <n> of <n> slots`, with n printed;
3. `token graph hit path: <n> resident experts`;
4. `expert cache auto: <f> GiB free, …` (what the card offered), `<m> MiB of VRAM free with everything loaded`, the prompt
   path's borrow line and the verifier's window line;
5. on every finished request, its hit-rate line (hits ÷ lookups) and its PCIe share of all routed (the #588 suffix);
6. the arena line, "large pages skipped (STRATA_NO_LARGEPAGES); using 4 KB pages", else every figure carries
   "ENGINE ≠ ENV";
7. one engine session: each `session is up (engine 0.1.39)` line after the first marks a restart, and every run that
   started after it carries "rides a restarted engine".

The label is "partial residency (n of 24,576 slots; hit rate h; PCIe share p)". A zero-doorbell line, or n = 24,576,
would contradict the card's size and is the lead's read before any figure prints.

## 5 · The gates and receipts on every run

Carried from PREREG-W1 §5 and PREREG-W2 §5, with the card changed, plus two receipts:
- **The identity gate.** Before the launch the client rebuilds the nine prompts and their sha256 must equal L-IQ3-t8's
  nine (4K `b42c6a18…` `9744fee0…` `214ec62f…`, 4,038 tokens; 32K `507b7bc9…` `c8a1ccb2…` `d6c96405…`, 32,038; 128K
  `2491e963…` `94613594…` `38d3c9a3…`, 128,037), or nothing launches; afterwards a run counts only if its
  `prompt_sha256` and the server's `prompt_tokens` equal the pins. A run that misses is withheld.
- **The slices guard; the tree gate** (Strata: the source tree's HEAD is 6f32ec07 and `git status --porcelain --ignored`
  prints nothing); **the line gate** (each engine's line equals §2's, element for element, or nothing launches); **the
  bytes** (every pinned file reads its sha256 at the window's open and again before its arm; the shards once, by
  `arms.sh` A1).
- **The count check and the recount road.** Every decode prints `withheld (COUNT-UNVERIFIED)` until the laptop's CPU
  `llama-tokenize` (A6's T-2 argv) recounts the kept replies after the window, within 3 % (D-20261002-054).
- **The memory receipts.** The arm unit's `memory.events`, `memory.peak`, `memory.current` and `pgmajfault` per run, and
  the box's MemAvailable at the launch, at /health, and at each run's start and end.
- **The CPU receipt (new, for §3.4's opening).** The arm unit's `cpu.stat` `usage_usec` at each run's start, first token
  and end, so each run prints its mean busy threads in the prompt and in the decode; and the box's load average per run.
  Where the kit does not read it, the opening says "CPU receipt unread".
- **The shared-work receipt (new: the label's evidence).** The kit's 1 Hz samples of both cards by bus id
  (`telemetry.py`): the desktop's smaller card's power, enforced limit, memory, temperature and utilisation, and the desktop's larger card's the same, so each
  run prints the desktop's larger card's median power and its share of samples with utilisation above 0 (production's work during that
  run). Production's request counts per run print where the kit can read them, else "unread".
- **The UPS**, per sample: status, load, battery.runtime and its low mark (`runtime_at_low`), as the kit records them.

## 6 · The stop rules

**Before an arm starts** (a miss means the arm does not start; recorded, never a figure): the seat proven on the desktop's larger card,
and the desktop's smaller card reading no compute process and at most 1,000 MiB used (the 09-26 gate's figure); the desktop's smaller card's enforced limit
reading **300.00 W**; the UPS on line within the kit's open budget; the bytes, tree, line and identity gates; and **the
memory floor**: MemAvailable at least **51.3 GiB** for R-S139-IQ3-24G (resident 49.84 GiB = the 46.84 GiB pinned
arena + 3.0 GiB of host overhead, plus 1.5: HARNESS-NOTES §4), and at least **N/48 × 46.84 + 7.0 GiB** for
R-LS-IQ3-24G (the working set N/48 × 46.84 + 3.0, plus 4: A7-7; 40.2 GiB at N = 34). The box read 100.54 GiB
available with production up at 01:46:04Z, so neither floor is expected to bind.

**Window-ending stops.** Every arm unit stops within one sample, the column is recorded as far as it got, each finished
run is labelled with the end reason, and the watcher restores:
1. **The UPS:** ups.status carrying OB, LB or FSD once, or a read that fails or answers no status (fail closed): the rule
   of D-20260926-001 (a), as the kit's `telemetry.py` holds it. battery.runtime at or under its low mark is recorded per
   sample and printed beside the column, **not a stop**. Windows 1 and 2's runtime trigger is not carried into this
   shape (the desktop's smaller card working beside a serving the desktop's larger card): the 09-26 window of the same shape read OL on all 3,450 rows, with
   the runtime estimate under its mark on 19 of them and no LB (D-20260926-004, -005), and its 300 W passes never read
   under 325 s.
2. **The memory guard:** the box's MemAvailable under **6 GiB** (the kit's `--mem-stop-gib`), so the bench yields before
   production does. The arithmetic: each arm runs under `MemoryMax=80G` (the desktop rows' cap: R-S139-IQ3 peaked at
   77.48 GiB of it, and at its last request held 49.60 GiB of the engine's own memory and 27.65 GiB of file cache); production and the kernel held
   22.85 GiB unavailable at 01:46:04Z (123.39 − 100.54); 123.39 − 80 − 22.85 = 20.54 GiB is the least the box can read
   with an arm at its cap, so the line fires only if something outside the arm grows by about 14.5 GiB. The arms run in
   an operator's user units (the kit), under user@1000.service beside the reranker's unit, which the desktop's systemd-oomd watches at
   50 % memory pressure for 20 s; the caps and this line keep the box far from that. A kernel OOM inside an arm's unit
   is a finding (arm-ending, below), never a re-run.
3. **The cap:** a sample in which the desktop's smaller card's enforced limit reads anything but 300.00 W, or its draw reads above 350 W on 3
   consecutive samples. Single samples just above the limit are normal (the desktop's larger card read up to 316.75 W at 300 W).
4. **Heat:** the desktop's smaller card at or above 83 °C on 3 consecutive samples (the estate's line for Ampere boards, D-20260926-006);
   the SSD's composite temperature above 80 °C where it can be read without privilege (PREREG §3), else "unread".
5. **The hard end:** the kit's (the open + 135 min for the arms, + 150 min for the watcher, as `window.sh` B7 stood at
   01:40Z); an arm cut there keeps its finished runs, labelled "cut at the cap".

The kit at 01:40Z holds 1, 2 and 5 live and samples 3 and 4 every second without stopping on them. If the window runs
without 3 and 4 held live, they are read from the 1 Hz record after the window: a run with a sample that breaks either
prints that label beside its figure and is the lead's read, and the window's report says the live stop was not held.

**Arm-ending stops.** The arm's unit stops, its record is kept, and the next step in §9 starts if its minutes fit:
- **a hung load:** no /health within the spec's 1,200 s; recorded `exited_before_ready`, a slip under the attempt rule,
  never re-run in the window;
- **a crash:** a CUDA error, an Xid, an out-of-memory on the card or in the unit, an abort, an engine or server exit
  mid-phase: a finding, recorded with its logs, never re-run in the window;
- a G0 refusal or `cpu_refused` (final); a placement VOID (§4);
- Strata's own 300 s silent-engine timeout and restart (#481, #637) are recorded as they happen and label the runs after
  them.

**Always:** a bench process seen on the desktop's larger card (its compute-apps list by bus id, wherever the kit reads it) makes its run
VOID and ends the window; the engine's one device line naming the RTX 3090 Ti is the receipt that the desktop's larger card was hidden.
One run per request: no request is repeated to move a reading into a band. The restore runs regardless (the arms'
end or death, the watcher, the deadline timer); an operator's restore paste is the backup only.

## 7 · The rules every figure carries

- **The attempt rule** (PREREG-W2 §7): an a1 whose three 4K runs finished with status ok and identity ok is never re-run,
  whatever its band and residency and whatever ended the arm later. a2 runs only if a1 has no three such runs, on a later
  night, and is then the figure of record whatever its direction, with a1 printed beside it. `exited_before_ready` is a
  slip; a G0 refusal and `cpu_refused` are final; a mid-phase crash is a finding. A new build sha is a new label.
- **The cut-row rule:** a context's figure exists only when all three of its runs finished with status ok and identity
  ok and none is VOID; a context with fewer prints its runs and no figure.
- **Out of band** (A1-4, PREREG-W0 §10.4): a 4K reading outside its band prints `OUT-OF-BAND (opened: no)`, and nothing
  quotes it until the lead has read the engine and server logs, the rows, §4's lines, the CPU receipt and the box's
  state (both cards' samples, the UPS rows, `row-meta.txt`). §3.4's risks are the opening's first hypotheses, not its
  conclusion.
- **Comparisons.**
  - *The two the desktop's smaller card arms, one window:* a difference is reported only when it exceeds the larger of 10 % of the larger
    reading or 3 × the wider row's spread (the cross-night rule's margin, PREREG-BANDS rule (3), kept for a same-window
    pair because the two arms run at different times in the window, beside production work that changes). The words are
    "beyond the registered margin" or "within the registered margin"; a ratio prints only when beyond, and only with both
    arms' placement labels in the sentence.
  - *The desktop's smaller card beside the desktop's larger card* (one computer; two cards, two builds, two placements, two nights; production live beside one
    and stopped for the other): side by side, never a ratio and never a difference verdict.
  - *The desktop's smaller card beside the laptop* (two computers; the same card memory; both split): side by side, never a ratio. Every
    sentence names both computers (CPU, memory, link), never "the 3090 Ti against the 5090 Laptop". The laptop's Strata
    0.1.39 rows are a STOPPED attempt's, exploratory, until its re-read under A9 reads; the desktop's smaller card's 0.1.39 figure stands
    beside the laptop's 0.1.25 figure of record only with both versions named.

## 8 · Quality and agreement, if time allows

The page's two tests are read on this card only if §9's minutes allow and the kit carries them; otherwise every line reads
**"not read on this card (time)"** or **"not read on this card (kit)"**.
- **R-S139-IQ3-24G quality:** the bench's quality phase on §2.1's line (the frozen 108 six-way and 48 doorman items, the
  kit's strict scorer, parser v2).
- **R-LS-IQ3-24G-fa0 quality,** a quality-only variant (A4-3 and A5-2 carried): §2.2's line at the frozen N with
  `-fa off`, `-ctv f16` (forced: 3cf03257 refuses a quantized V cache without flash attention) and `-c 8192`; a load (G0,
  a 10 s hold), then the quality phase; never a speed phase, no band. Every line prints "fa-off (V cache f16, forced) at
  an 8K context". Why fa-off: the fa-on build stopped twice on the doorman's second item on the laptop (Xid 31, A4-1).
  A4-5 and A4-6 carry.
- **How they are read:** G1 by A1-1's bridge rule (the same strict choice, joined by `prompt_sha256`; two unscored
  replies agree), the Strata arm against the fa-off variant, with the thresholds 105 of 108 and 47 of 48; G2 against 93
  and 36. Each prints as its own row, labelled "the 24 GB desktop card, the Strata engine 0.1.39" (the laptop's G1 and G2
  were read on 0.1.25). A pass or a miss here changes no laptop verdict, and "Better" is not read on this card.

## 9 · Order and minutes

In this order (the kit's order for the two speed arms). Each step starts only if the kit's hard end leaves its upper
estimate, and never with less than the kit's `MIN_ARM_S` (1,200 s):

| Step | Minutes [inferred] | Basis |
|---|---:|---|
| 1. R-S139-IQ3-24G speed | 5-10 | R-S139-IQ3's whole speed phase took 2 min 47 s on the desktop's larger card; the laptop's S-IQ3 first words were 1.9 / 12.1 / 47.6 s |
| 2. R-LS-IQ3-24G fit (the registration's road) | 3-8 | one or two loads with a 10 s hold |
| 3. R-LS-IQ3-24G speed | 40-50 | the laptop's L-IQ3-t8: first words 19.1 / 125.6 / 545.1 s, then 256 tokens at 14-24 tok/s, three times each |
| 4. R-S139-IQ3-24G quality | 8-12 | 156 items at 2-3.5 s each, plus a start (RECON-v1's quality block) |
| 5. R-LS-IQ3-24G-fa0 load and quality | 10-15 | the same, with a slower prompt read |

The Strata arm goes first: it is the page's newest figure and the shortest step, so a window cut early still carries one
whole engine. The first run after step 3's load may find shard 1 in the page cache from step 1 (the Strata engine reads
its arena through the file cache); its `pgmajfault` and disk reads print beside it, and the median keeps it (A2).

## 10 · What the page may print: the third column

- **The heading:** "EVGA GeForce RTX 3090 Ti FTW3 Ultra (24 GB), in the 96 GB card's desktop computer, beside live work on
  that computer's other card", with the computer (AMD EPYC 7532, 32 cores; 128 GB of DDR4-3200 in eight channels; a PCIe
  4.0 x16 link), the cap (300 W), the date, and the window's start and end (UTC).
- **Banded:** each engine's writing speed at 4K, the median of 3 with its three runs, against the band drawn here before
  any reading: "inside the band we wrote down before the run", "outside it" with what the opening found, "under the
  floor", or VOID; the Strata engine's band printed with its width (its top is 3.8 times its floor).
- **Exploratory, labelled so:** writing at 32K and 128K; the first word and the prompt rate at every length; the placement
  (llama.cpp's N of 48 layers' experts in system memory and which road set N; the Strata engine's n of 24,576 experts on
  the card, hit rate, PCIe share, tokens a round and rounds a second); workers and threads; watts, temperatures and clocks
  (recorded, claiming nothing; no energy or cost figure); host memory; quality and agreement if read (§8). A Strata 0.1.39
  128K figure here is one the laptop could not take (its 128K slice stopped on host memory, A9-1); the sentence says that
  and nothing more.
- **Comparisons:** only as §7 allows. The the desktop's smaller card pair under the registered margin; beside the desktop's larger card and the laptop, side by
  side with each column's conditions, never a ratio across columns.
- **Never:** "the 3090 Ti is N times the 5090 Laptop" or "N times the RTX PRO 6000"; a figure without its column's labels
  ("beside live work on the computer's other card"; "N of 48 layers' experts in system memory"; "partial residency (…)");
  a decode before its recount reads; an OUT-OF-BAND reading before its opening; box names, hostnames, `/home` paths, a
  port number, or any UUID (the publish laws; the page's own words for the computers are "the laptop" and "the desktop").

## 11 · What this amendment does not change or claim

- No laptop arm, band, gate or threshold moves. The desktop's PREREG-BANDS rows and R-LS-IQ3's and R-S139-IQ3's readings
  and verdicts stand. Neither the desktop's smaller card row is an attempt of a desktop or a laptop row.
- Nothing about two cards working together (each engine sees one card), about either engine on an otherwise idle
  computer (production runs beside it), about `--kv-resident` (named off, as on the desktop's larger card), about llama.cpp at more than 8
  threads or another micro-batch, or about any later build of either engine.
- One computer, one card, one window, one build of each engine.

## 12 · The ledger row, drafted for the lead (preamble §6)

`D-20261009-0xx | 2026-10-09 | REGISTERED (2026-10-09T01:49:12Z): AMENDMENT-24G, the Strata bench's third setup: the desktop's smaller card (EVGA GeForce RTX 3090 Ti FTW3 Ultra, 24 GB, 300 W) in the desktop, beside live production on the desktop's larger card | Under D-20261009-004 (an operator, verbatim: "having 3 columns, 2x on the same server (1x 6000, 1x 3090 ti, w 128g ram) vs 5090 laptop w/ 64g ram, would be some nice #s to have"). plans-2026-10-09/card24-strata-window/AMENDMENT-24G.md (sha256 in the lane's return). Arms: R-S139-IQ3-24G (Strata 6f32ec07 built for sm_86, the desktop's line element for element; the auto cache gives partial residency) and R-LS-IQ3-24G (llama.cpp 3cf03257 built for sm_86, L-IQ3-t8's line; N by its own fit from the prior 34, or the prior road at 34, labelled); quality reads if time allows (Strata; llama.cpp fa-off at 8K), else "not read on this card". 4K bands by the desktop's method (published bandwidth over 5.159 GB a token, split into card, host-memory and PCIe parts; the desktop's shares unchanged): llama.cpp 24-46 % of C(N) = 31-59 tok/s at N = 34 (C = 127.80); Strata 17.43-55.42 rounds/s × 2.25-2.69 = 39-149 tok/s (C_round 124.53-149.78 from S-NEW a2's own placement counts). Checks on file inside both (laptop 31.1 % and 24.5-27.6 %; the desktop's larger card 29.6 % and 22.6 %). Named risk: llama.cpp may read 15-23 tok/s if 8 Zen 2 threads bind the CPU half. Stops: the UPS (OB/LB/FSD/unreadable); MemAvailable < 6 GiB (80G caps; floors 51.3 and N/48 × 46.84 + 7 GiB); the cap (≠ 300.00 W, or > 350 W on 3 samples); heat (83 °C on 3); a hung load (arm-ending); the kit's hard end. Page: the third column, banded at 4K, exploratory elsewhere, no ratio across columns.`


---

## Addendum 1 · ARM 3: current llama.cpp with the model's draft head, its refusal and its registered fork

| | |
|---|---|
| **Registered** | 2026-10-09T02:13:58Z (`date -u` on the laptop, read by the append step as this addendum was written), by the lane `bsw2-arm3` (Opus), before any arm-3 reading and before the window opens |
| **Appended to** | this file as registered at 2026-10-09T01:49:12Z, sha256 `withheld-2026-09-29`, read unchanged at 01:52:05Z and again at 02:11:36Z. Append-only: nothing above this line moves |
| **Authority** | an operator, ~01:5xZ, on the AskUserQuestion about llama.cpp's draft head (verbatim as the brief quotes it): "Add a current-llama.cpp arm tonight on the desktop's smaller card". Ledger D-20261009-007 |
| **Before any reading** | Yes. No arm-3 reading exists anywhere. Every step below ran on the desktop's CPU inside a bwrap sandbox with no GPU device node (`nvidia nodes: 0`) and no network but loopback; the desktop's smaller card and the desktop's larger card were not touched |
| **Receipts** | `arm3-receipts/` beside this file (SHA256SUMS, 32 files; the loopback address replaced by `<loopback>` in the copied logs); the lane's report `ARM3.md` |

### A1.1 · The draft head in llama.cpp, read from the change and the tag's source

- **The change.** "Qwen4Exp: add MTP", ggml-org/llama.cpp #29761: merged 2026-10-01T11:13:30Z into the branch
  `aman/qwen4-opt`, merge commit `c061df19838ff60970faf54fd7e414953590125d` (13 files). GitHub's compare at 01:53Z:
  master holds it (184 commits ahead, 0 behind); it is 268 commits after the benched `3cf03257`. Before it, the
  converter dropped the block (`supports_mtp_export = False`, `no_mtp = True`: "the MTP block is a separate draft head;
  vLLM drops it too").
- **The flags.** `--spec-type draft-mtp` (the tag's `docs/speculative.md`: "Use Multi Token Prediction (MTP) heads from
  the main model") and `--spec-draft-n-max 3` (the default, 3; the change's own measuring line was `-np 1 -lzm on
  --spec-draft-n-max 3 --spec-type draft-mtp`, on another computer: never an input here). No draft file: without
  `-md` the draft context runs on the main model's own MTP block (`common/speculative.cpp`: "creating MTP draft context
  against the target model"). Never `--mtp` (the download tool's "also download the multi-token prediction (MTP)
  head") and never `-hf`: those are the only paths that plan a download; with `-m` naming a local file none is planned,
  and this build carries no HTTPS client at all (OpenSSL not found: cpp-httplib "HTTPS support disabled").
- **What the GGUF must carry** (`src/models/qwen4exp.cpp`, `src/llama-model.cpp` at the tag): the key
  `qwen4exp.nextn_predict_layers` = 1 with `qwen4exp.block_count` = 49 (the trunk's 48 + the block), a 49-entry
  `attention.compress_ratios`, and the block as `blk.48.*`: a whole layer (the two hyper-connection mixers, attention and
  indexer, router, the 512 experts and the shared expert) plus `blk.48.nextn.eh_proj`, `.enorm`, `.hnorm`,
  `.hc_head_norm`, `.hc_head_down` and `.hc_head_up`. llama.cpp's own detection reads
  `blk.<block_count − 1>.nextn.eh_proj.weight`.
- **The pin: `b11514` = `de7fa0a3c6a2e1b4cd9f22eb8d6bf5b12dbdb63b`**, the newest release tag at 01:53Z (published
  2026-10-08T20:14:45Z; GitHub marks it prerelease, as it marks each of the five newest `b` tags); the desktop's own
  `git ls-remote` read the same commit. It holds the change and every later change to `src/models/qwen4exp.cpp`
  through 2026-10-07, among them #29825 "halve the indexer score memory", #29994 "fix k-pool scatter data race on
  shared sequences" and #30097 "share the nextn tensor flags between models". The newest release GitHub does not mark
  prerelease, `v0.6.0` (target `8345f333`, 2026-10-05), also holds the change but is 84 commits older and lacks #29994,
  #30017 and #30097 (GitHub compare); "current" is read as the newest tag.

### A1.2 · The file of record carries no draft head: ARM 3 with the head is REFUSED

- **The file, read.** The IQ3_S pair at the pinned paths (shard 1 `4c1eb2ce…`, shard 2 `316b46f3…`, read OK against
  the pins by the stage at 01:28:33Z), its GGUF header read only, with gguf-py from the bench's own 3cf03257 tree, at
  01:55:23-01:55:33Z (`arm3-receipts/gguf-mtp-check.txt`): shard 1, architecture `qwen4exp`, `block_count` 48, **no
  `nextn_predict_layers` key**, 1,223 tensors on blocks 0-47 only, **0 tensors named `nextn` or `mtp` or on a block
  above 47**; shard 2, 1 tensor (`per_layer_token_embd.weight`); 1,224 in all (`split.tensors.count`).
- **The build, asked.** The b11514 server with the head asked (A1.3's line with three load-test changes, `-ngl 0`, a
  port of its own inside the sandbox and `--no-warmup`, plus `--spec-type draft-mtp --spec-draft-n-max 3`), CPU only,
  02:03:10Z (`arm3-receipts/loadtest/head/`): `print_info: n_layer_all = 48`, then
  `W llama_init_from_model: context type MTP requested but model doesn't contain MTP layers`,
  `E common_speculative_init_result: failed to create MTP context`, `E srv load_model: failed to create MTP context`,
  `E srv llama_server: exiting due to model loading error`; rc 1 at 59 s, no /health.
- **So ARM 3 as briefed (current llama.cpp with the draft head) is refused on this file**, by the file (the IQ3_S
  conversion predates the head's export) and by the build's own check. **No file is swapped**: the Strata engine's
  draft-head files (`~/bench-flashnext/mtp/rt-6f32ec07/`: `dense.bin`, `experts.bin`, `draft_vocab.bin`, `dense.txt`,
  the engine's own format, none a GGUF) are not used,
  and any GGUF carrying the block would be a different file, so a different registration. No band is drawn for a
  head that cannot load.

### A1.3 · THE REGISTERED FORK: R-LS-B11514-IQ3-24G, "current llama.cpp, no draft head"

The brief's fork, registered here so the arm may run: the same file, line and placement as R-LS-IQ3-24G (§2.2),
with the current build.

- **Engine.** llama.cpp `b11514` = `de7fa0a3c6a2e1b4cd9f22eb8d6bf5b12dbdb63b`, built on the desktop from source by
  `stage/arm3/desktop-build-arm3.sh` (sha256 `withheld-2026-09-29`) in the user unit `bsw2-arm3-build` (Nice 19, CPUQuota 1600 %,
  MemoryMax 24G, idle I/O): the source a full local copy of the bench's 3cf03257 clone plus the tag fetched
  (`~/card24-strata/src/llama.cpp-b11514`, HEAD `de7fa0a3…`, rev-list count 11,514, `git status --porcelain
  --ignored` empty before and after the build; the change's merge `c061df19` an ancestor); configured and built inside
  bwrap with no network and no GPU node, **with the stage's flags exactly** (Release, `GGML_CUDA=ON`,
  `CMAKE_CUDA_ARCHITECTURES=86`, nvcc = window 0's staged CUDA 13.4.92, `GGML_NATIVE=ON`, `LLAMA_CURL=OFF` (deprecated
  at this tag, no effect), `LLAMA_BUILD_TESTS=OFF`, `LLAMA_USE_PREBUILT_UI=OFF`, the build RPATH to the staged 13.4
  folder); targets llama-server, llama-bench, llama-cli; built in 270 s; **BUILD DONE 02:02:21Z**; **`llama-server`
  sha256 `9be2b7137acec10803c70cf02ce1bfd0c87bdf4743231e39ce53b7d0f1d33eeb`** (13 binaries in
  `arm3-receipts/BINARIES.sha256`); 144 `sm_86` ELF entries in `libggml-cuda.so` and no other architecture;
  `GGML_VULKAN` OFF; `--version`: "0.6.0-dev (build 11514, commit de7fa0a3c)". Output
  `~/card24-strata/build/llama.cpp-b11514-sm86/`. A new build sha is a new label: this row is never an attempt of
  R-LS-IQ3-24G.
- **The line: R-LS-IQ3-24G's, element for element**, built by the client's own `engines.llama_argv` (the laptop's
  L-IQ3-t8 line): `-m <shard 1> --host <loopback> --port withheld-2026-10-13 -ngl 99 --n-cpu-moe N -c 131072 -fa on -ctk q8_0 -ctv q8_0
  -lm mmap --lazy-mode on -fit off -np 1 --cache-ram 0 --no-webui --jinja -lv 4 -t 8 -tb 8`: the default 512-token
  micro-batch (no `-b`/`-ub`), 8 threads, flash attention on, the 8-bit KV cache. **The build is the only change.**
  Every flag exists unchanged at the tag (`common/arg.cpp`). The CPU load of this line (A1.2's three load-test changes,
  no head; 02:04:46Z, `arm3-receipts/loadtest/nohead/`) parsed it whole, answered /health 200 after 66 s and gave one
  8-token greedy reply, " Paris. The capital of Germany is Berlin" (CPU only, never a figure).
- **N, from R-LS-IQ3-24G.** The arm runs at the N that arm's row prints (the frozen N of its fit, or the prior
  road's 34) and has no fit of its own. Its own load's card peak `memory.used` before the first request is read against
  the fit rule's 1,536 MiB margin and printed beside every figure when under it ("under the fit rule's margin"), never a
  stop. The CPU loads hint the card's share moves little [inferred]: at 131,072 cells b11514 sized the attention cache
  1,632 MiB (as 3cf03257), the indexer cache 408 MiB (3cf03257: 204), the recurrent state 112.57 MiB (the same) and the
  CPU compute buffer 607.62 MiB (3cf03257: 988.51). A load that dies on the card is a crash (§6: arm-ending, never re-run
  in the window, never refitted).
- **The label every figure carries:** "current llama.cpp (b11514), no draft head: the file carries none", with §2.2's
  and §10's labels ("N of 48 layers' experts in system memory", "beside live work on the computer's other card") and
  which road set N.
- **G0** as §2.2's, with the banner `build 11514 (de7fa0a3…)`. The client's regexes read b11514's lines as they read
  3cf03257's (`build (\d+) \(…\)` on "build 11514 (de7fa0a3c)"; `n_threads = 8 (n_threads_batch = 8) / 64`;
  `llama_context: flash_attn = enabled`; the KV line); the device, offload and buffer lines come from the same format
  strings in both trees (`src/llama.cpp` "using device %s (%s)…", `src/llama-model.cpp` "offloaded %d/%d layers to GPU",
  "model buffer size").
- **§4's placement test applies unchanged**, with N. Checked on the CPU: at `-ngl 0` both builds print the same three
  buffer lines (CPU_Mapped 52,267.55 MiB, CPU_REPACK 17,780.80 MiB, CPU_Mapped 27,465.95 MiB, the last the n-gram table
  §4 item 5 names), so this build's loader places this file as 3cf03257's does on the CPU side; the card split is read
  only in the run.
- **§5's gates apply unchanged.** The identity gate's token half was pre-read without inference: the nine pinned
  prompts (rebuilt by the client's own `prompts.py` and nonces, each matching its pinned sha256) through b11514's own
  chat template (one user turn, `enable_thinking` false) and tokenizer: **9 of 9 equal to the pins** (4,038 / 32,038 /
  128,037), and the rendered text byte-identical to 3cf03257's on all nine (`arm3-receipts/tplcheck/`).
- **§6's stops and §7's rules apply unchanged**, the attempt rule included (a1 only; a2 on a later night).
- **Order and minutes.** Last: after every step §9 lists (in the kit as it stands, which carries the two speed arms and
  no fit or quality step, the third arm). It starts only if the kit's hard end leaves its upper estimate, **40-50 min**
  (§9 step 3's, the same line), and never with less than `MIN_ARM_S` (1,200 s); cut at the hard end, it keeps its
  finished runs ("cut at the cap"), and 4K runs first.
- **The pair rule.** R-LS-B11514-IQ3-24G beside R-LS-IQ3-24G is §7's same-window pair: "beyond the registered
  margin" (the larger of 10 % of the larger reading or 3 × the wider row's spread) or "within the registered margin"; a
  ratio prints only when beyond. The sentence names what differs: two llama.cpp builds 452 commits apart (3cf03257 at
  rev-list 11,062; b11514 at 11,514), the same file, line, N and card. It never says "the draft head".

### A1.4 · The band: writing speed at 4K, drawn by the bench's method before any run

**How it is set.** No reading of this build exists, on any card. §3.1's method takes no reading of the setup being
banded: the ceiling C(N) is the file's bytes per generated token over the published speeds of where the placement reads
them, and depends on the file and N, never on the build; the shares are the desktop's llama.cpp shares, unchanged
(24-46 %, PREREG-BANDS). So the fork's band equals R-LS-IQ3-24G's at the same N, by construction, before any reading.
Recomputed independently (`arm3-receipts/bands-arm3.py` and `bands-arm3.out`), equal to §3.2's table on every row:

> C(N) = 1 ÷ [ (4,176,458,240 + (48 − N) × 20,464,000) B ÷ 1,008 GB/s + N × 20,464,000 B ÷ 204.8 GB/s ]

At N = 34: (4,176,458,240 + 14 × 20,464,000) B = 4,462,954,240 B ÷ 1,008 GB/s = 4.4275 ms on the card; 34 × 20,464,000 B
= 695,776,000 B ÷ 204.8 GB/s = 3.3973 ms from host memory; 7.8248 ms a token, **C(34) = 127.80 tok/s**.

| Band (decode at 4K, median of 3) | Share of C(N) | **At N = 34 (tok/s)** |
|---|---:|---:|
| **Predicted** | 24-46 % | **31-59** (30.67-58.79) |
| Outside the prediction | 12-24 % or 46-100 % | 15-31 or 59-127.80 |
| Under the floor | under 12 % | under 15 (15.34) |
| Impossible: **VOID** | above 100 % | above 127.80 |

The band of record is the row of the N the arm runs at (§3.2's table: N = 33, 31-59; 35, 30-58; 36, 30-58; 38, 29-56;
40, 29-55; any other N by the same formula, written by the lead before the speed phase). §3.4's named risk carries
unchanged: 8 Zen 2 threads may bind the CPU half and put the reading near 15-23 tok/s, outside the band, low. The 32K and
128K readings, the first word and the prompt rate are exploratory, no band.

### A1.5 · What this addendum does not change or claim

- No arm, band, gate, stop or order above moves; R-LS-IQ3-24G and R-S139-IQ3-24G stand as registered.
- Nothing about llama.cpp's draft head: no row, no band, no speed. The page may say only what A1.2 read: the file we
  benched carries no draft-head block, so llama.cpp's draft head (#29761, b11514) was not run on it. The change's own
  figures (another computer, another quantisation) are never quoted as ours.
- The fork's figure, if read, is "current llama.cpp, no draft head" on this one card, in this window.


---

## Addendum 2 · the R-4 audits' fold: what the kit now reads, holds and records

| | |
|---|---|
| **Registered** | 2026-10-09T04:29:19Z (`date -u` on the laptop, read by the append step as this addendum was written), by the lane `bsw2-fold` (Opus), before any the desktop's smaller card reading and before the window opens |
| **Appended to** | this file as it stood after Addendum 1: sha256 `withheld-2026-09-29` (57,156 B), read unchanged at 2026-10-09T04:29:19Z; its first 43,288 B still hash to `withheld-2026-09-29`, the registration of 01:49:12Z. Append-only: nothing above this line moves |
| **Authority** | an operator's go for the window, verbatim as the briefs quote it: "if so, then it's honestly NBD to bench it tonite … having 3 columns, 2x on the same server (1x 6000, 1x 3090 ti, w 128g ram) vs 5090 laptop w/ 64g ram" (ledger D-20261009-004..006); for arm 3, "Add a current-llama.cpp arm tonight on the desktop's smaller card" (D-20261009-007). The fold is the order of record's per-PR cycle: an R-4 audit, the fold, then a fresh verify of the fold (R-6) |
| **Before any reading** | Yes. the desktop read at 2026-10-09T04:06:25Z: `~/card24-strata/` holds `build dry kit src stage` only; no `window/` and no `results/`. No the desktop's smaller card row of any arm exists |
| **What it folds** | `AUDIT-BENCH.md` (1 BLOCKING, 3 IMPORTANT, 6 NICE) and `AUDIT-OPS.md` (0 BLOCKING, 4 IMPORTANT, 11 NICE), both written 2026-10-09 between 03:36Z and 03:59Z, beside this file. The fold's record, with every change, test and receipt: `FOLD.md` |

### A2.1 · What this addendum is, for a reader who scrolled straight here

Two independent audits read this registration and the window's kit (the scripts that open the window on the desktop, run the
three arms on the desktop's smaller card and put production back) between 03:36Z and 03:59Z on 2026-10-09. One found that nothing outside
this folder anchored Addendum 1's bytes. The others found places where the kit read less than §5 and §6 register, or
printed the desktop's larger card's VOID lines beside the desktop's smaller card's Strata runs. This addendum records how the kit now reads each of them, so
every line the window applies was written down before the first reading. **No arm, band, share, floor, VOID line,
threshold, stop line, order, minutes or label in §§1-12 or Addendum 1 moves.** Compared with the kit Addendum 1 ran
against (pin `3eadf9f23b35a1c1…`, 03:35Z), the kit now reads more and refuses in three new places, each before a
figure exists.

### A2.2 · The Strata row's VOID lines are the desktop's smaller card's (AUDIT-BENCH I-1)

The kit's row script printed window 2's VOID lines beside every Strata run: tokens a round × 347, and 2,084 (the desktop's larger card's
card). It now takes the two lines as arguments, and arm 1 passes §3.3's: **tokens a round × 241.35, and 1,448**. Each
R-S139-IQ3-24G run's summary prints those, and the row's `void_lines` field names them. The lead's opening applies
§3.3's lines in every case.

### A2.3 · The CPU receipt (§5), as the kit now reads it (AUDIT-BENCH I-2)

§5 registers the arm unit's `cpu.stat` `usage_usec` at each run's start, first token and end, and the box's load
average per run. The row script reads `usage_usec` at each run's start and end, as before. New: the telemetry reads it
**once a second** for the running arm unit, with the box's 1-minute load average, in its record (`telemetry-1hz.csv`:
`arm_unit`, `arm_cpu_usage_usec`, `loadavg_1m`). The split at the first token is read from that record at the sample
nearest the run's first token (the client's `t_first_token`), so each half can carry up to one second of the other.
The load average per run is the samples inside that run, printed as their median and range. The opening of a llama.cpp
figure prints "CPU receipt: start and end exact; the first-token split to 1 s (the 1 Hz record)".

### A2.4 · The engine builds, named and read by their target (AUDIT-BENCH I-3)

- Every arm's block names its engine by sha256: `strata` `2d713a91…` (arm 1), 3cf03257's `llama-server` `1d702293…`
  (arm 2), b11514's `llama-server` `9be2b713…` (arm 3), each equal to its build receipt (`stage-receipts/`,
  `arm3-receipts/`). The kit's tests read every arm's engine pins against those receipts.
- Before each launch, the build's own `CMakeCache.txt` must read `CMAKE_CUDA_ARCHITECTURES=86`, or the arm does not
  start.
- At /health, before the first measured request, a llama.cpp server whose start line reads `CUDA : ARCHS =` anything
  but `860` is refused, and its runs are withheld (`arch_refused`). An absent start line is recorded, never a refusal.

These read the `sm_86` target §2.1 item 1, §2.2 and A1.3 register; they add no threshold to any figure.

### A2.5 · The live stops (§6), fail-closed (AUDIT-OPS I-1, I-2, N-3)

- **The "always" rule's read.** A compute-apps list that does not read (a non-zero exit with no row at all, or a
  timeout) on 3 samples in a row now ends the window as a LARGER-CARD-STOP, as an unread the desktop's smaller card is a CAP-STOP. Its marker
  says "did not read". Unlike a bench process seen on the desktop's larger card, it does not make a run VOID: the runs finished before it
  stand, labelled with the end reason, by §6's window-ending rule.
- **The watcher.** It now also ends the window when an arm unit runs while the telemetry unit is gone (no live stop
  would hold), and on MemAvailable under 6 GiB read by itself (an unread figure fails closed). So §6's stops 2-4 and
  the "always" rule no longer rest on one process.
- **The restore.** It writes a marker before it stops the bench, and no arm starts once that marker exists.

### A2.6 · Each arm's band rides its row (AUDIT-BENCH N-3, N-6)

Each arm's row now records its band, never judged by the kit: arm 1 §3.3's (39-149 tok/s), arm 2 §3.2's at N = 34
(31-59 tok/s) and arm 3 A1.4's (31-59 tok/s). Arms 2 and 3 also carry §2.2's prior-road label, "N = 34, the laptop's
fit, not refitted on this card". The fit rule's margin (the card's peak `memory.used` before the first request, against
1,536 MiB, §2.2) is read by the lead after the window, from the row's 1 Hz card record (`gpu-1hz.csv`) and its first
`run_start`.

### A2.7 · How the bands were built, disclosed (AUDIT-BENCH N-2; no band moves)

- The Strata band's top uses S-NEW a2's 32K request 5 (C_round 149.78 rounds/s). With the three 4K requests alone
  (124.53-144.77), the band would read 39-144.
- The shares are the desktop's bracket as §3.1 takes it, 14-37 % and 24-46 %. At the desktop's exact shares (its 50-130
  rounds/s and 85-160 tok/s are 14.39-37.43 % and 24.47-46.06 % of 347.4), the Strata band would read 40-151, and
  llama.cpp's is unchanged at 31-59.
- Both bands stand as §3 registers them. The page says the Strata ceiling range spans all six of the laptop's requests
  (three at 4K, three at 32K).

### A2.8 · The line checks (AUDIT-OPS N-8)

Every llama.cpp line is now checked before its launch for llama.cpp's download flags (the model, Hugging Face, Docker
and projector URL flags, as `--flag value` or `--flag=value`), not only arm 3's. A `LLAMA_ARG_*` variable in the arm's
environment refuses the arm, because llama-server reads each as a flag the line does not show. The network stays cut as
§2.3 writes it; these checks keep each line the registered one.

### A2.9 · The anchor (AUDIT-BENCH B-1)

Nothing outside this folder recorded Addendum 1's bytes. The kit as sealed by `bsw2-fold` carries this file's whole
sha256, this addendum included, in `kit/registration/AMENDMENT-24G.sha256`. That kit is staged on the desktop, a second
computer, and its tests fail if this file changes. The ledger row the lead writes before the window opens (drafted in
`FOLD.md`) names this file's sha256, the registered prefix and the kit's pin.

### A2.10 · What this addendum does not change or claim

- Nothing in §§1-12 or Addendum 1 moves. The kit now applies §3.3's VOID lines where it printed the desktop's larger card's.
- The three new refusals (a build of another target; a download flag on a llama.cpp line; a `LLAMA_ARG_*` variable)
  end an arm before it is measured. None reads, moves or replaces a figure.
- How a `CPU_REPACK` buffer line on the card would be read (AUDIT-BENCH N-4) is not ruled here. §4 item 6 stands as
  written ("no other model buffer line"), and `FOLD.md` puts the question to the lead.