# duet-chopin-sousa-r64 -- INFORMAL / NON-GATE

A 50/50 merge of two rank-64 LoRA adapters, built offline on CPU:
  chopin: adapters/20260829T162506Z-stage0-r64/final
  sousa : adapters/20260830T004943Z-sousa0-r64/final

Method: targets dW = 0.5*dW_chopin + 0.5*dW_sousa exactly, then takes the
best rank-64 representation of that sum by truncated SVD (equivalent to
peft add_weighted_adapter combination_type='svd', computed directly from
the adapter files so no base model is loaded). A per-key average of the
LoRA factors was rejected: it introduces B1@A2 and B2@A1 cross terms and
is not a blend of the two adapters.

Rank-64 truncation cost, relative Frobenius error vs the exact rank-128 sum:
  mean 0.0120   min 0.0017   max 0.0339 (at base_model.model.layers.7.self_attn.k_proj)
